diff --git a/topology/Field-Switch-Topology.drawio b/topology/Field-Switch-Topology.drawio
index c653bee..1112447 100644
--- a/topology/Field-Switch-Topology.drawio
+++ b/topology/Field-Switch-Topology.drawio
@@ -1 +1 @@
-
\ No newline at end of file
+
\ No newline at end of file
diff --git a/topology/Field-Switch-Topology.png b/topology/Field-Switch-Topology.png
index 738863c..3220943 100644
Binary files a/topology/Field-Switch-Topology.png and b/topology/Field-Switch-Topology.png differ
diff --git a/topology/generate_drawio.py b/topology/generate_drawio.py
index 9e8c1ec..c8cc280 100644
--- a/topology/generate_drawio.py
+++ b/topology/generate_drawio.py
@@ -132,8 +132,8 @@ def place_section(depth_map, yslot_map, y_offset):
TITLE_H = 60
LEGEND_ROW_H = 34
-VLAN_ROW_H = 20
-VLAN_HEADER_H = 24
+VLAN_ROW_H = 26
+VLAN_HEADER_H = 30
VLAN_TABLE_W = 900
vlan_rows = max(1, len(vlans)) # the placeholder counts as one row
VLAN_TABLE_H = VLAN_HEADER_H + vlan_rows * VLAN_ROW_H + 16
@@ -278,8 +278,8 @@ for idx, e in enumerate(edges):
edge(f"e{idx}", f"n{a}", f"n{b}",
"edgeStyle=orthogonalEdgeStyle;rounded=1;html=1;strokeColor=#9AA6B8;strokeWidth=1.2;"
"startArrow=none;endArrow=none;"
- "jettySize=auto;orthogonalLoop=1;fontSize=7.5;fontColor=#7C8AA6;"
- "labelBackgroundColor=#F7F8FBcc;align=center;verticalAlign=middle;",
+ "jettySize=auto;orthogonalLoop=1;fontSize=13;fontStyle=1;fontColor=#3A4457;"
+ "labelBackgroundColor=#F7F8FBee;align=center;verticalAlign=middle;",
value=label)
# legend
@@ -317,14 +317,14 @@ add_cell(
)
add_cell(
f''
+ f'fontStyle=1;fontSize=15;fontColor=#33415C;" vertex="1" parent="1">'
f''
)
cx = vt_x + 90
for label, w in vt_cols:
add_cell(
f''
+ f'verticalAlign=middle;fontStyle=1;fontSize=12;fontColor=#7C8AA6;" vertex="1" parent="1">'
f''
)
cx += w
@@ -340,7 +340,7 @@ if not vlans:
f''
)
@@ -359,7 +359,7 @@ else:
for (label, w), val in zip(vt_cols, row_vals):
add_cell(
f''
+ f'verticalAlign=middle;fontSize=12;fontColor=#3A4457;" vertex="1" parent="1">'
f''
)
cx += w